JTAG ISP Software

Embedded JTAG/Boundary Scan Test and Programming

SYSTEM CASCON JTAG/Boundary Scan Software is available in 3 different editions: Advanced, Flash and PLD.
The feature set is configurable according to your needs and can be upgraded up to the most powerful edition.
All software functions are accessible via an intuitive graphical user interface.

Since CASCON POLARIS is based on the proven JTAG/Boundary Scan software SYSTEM CASCON, it offers the same advantages of an integrated development environment.

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JTAG ISP Software

CASCON POLARIS is a powerful, flexible and user-friendly development and operating environment for JTAG/Boundary Scan in-system-programming and on-chip flash programming of microcontrollers with the help of VarioTAP technology.

Application specific versions for special needs in laboratory, production and service environments are available. Combining CASCON POLARIS with GOEPEL electronic’s controllers and accessories, users can configure high performance JTAG/Boundary Scan programmers for various performance classes.

Since CASCON POLARIS is based on the proven JTAG/Boundary Scan software SYSTEM CASCON, it offers the same advantages of an integrated development environment.

System architecture, user interface, file handling, libraries and the actual ISP tools are all identical.
With the exception of the infrastructure test, CASCON POLARIS does not have any test tools. The CASCON POLARIS routines are immediately applicable in SYSTEM CASCON without modifications.

Software tools for boundary scan in-system programming only.

  • Integrated JTAG/Boundary Scan development environment for In-System programming (ISP)
  • ATPG for Infrastructure Test
  • Easy manual FLASH programming with CASLAN programming language
  • Automatic FLASH Program Generator (AFPG)
  • Support of SVF, JAM/ STAPL for vector import, support of IEEE-Std.1532 (2002)
  • Library section with BSDL support and form editor for interactive model generation
  • Gang-programming support of multiple UUTs
  • Different Editions for development and production
  • Modular and scalable software configurations
  • Full network capability / floating license / FlexLM
  • Standard JTAG/Boundary Scan Test, IEEE1149.x
  • Integrated viewers for Layout, Schematic and netlist
  • Easy integration with In-Circuit test, Flying Probes or Functional test

More than JTAG, Goepel Embedded System Access also includes:

  • Visual Project Explorer, a new Cascon user interface to present complex board and test information in a simple way.

  • A processor-specific model allows the processor to enter the debug mode. With VarioTAP individual functions (analog registers, flash access, real-time RAM tests) are addressed. Both the JTAG port and other debug interfaces are supported.

  • This method integrates the FPGA logic into the test. Even complex test applications are easy and efficient to solve with ChipVORX. Access to internal Gigabit links and other functionalities (frequency measurement, flash access, RAM tests) is possible via universal FPGA models (no separate adaption necessary).

  • JEDOS – JTAG Embedded Diagnostics Operating System for embedded test & diagnostics by functional testing in real time using the native processor. Using JEDOS (optimized for test and programming applications), complex function tests with a graphical user interface are realized. These are complete memory tests, efficient flash access or interfaces tests (Ethernet, USB …). The tests can be created in the shortest possible time without special hardware knowledge.

The VarioTAP IP technology is used to control a processor using the debug port. You use VarioTAP to access the register level of a microcontroller and use its integrated structures. You can access it via the JTAG interface or other debug interfaces (e.g. SWD or DAP).

If you are using a controller that does not support Boundary Scan, VarioTAP is a very good alternative.
The functional structure has multiple stages:

  • Flash programming both on-chip and external (e.g. eMMC, NAND, SPI Flashes)

In principle, all modern processors and microcontrollers are supported. Everything works in combination with the SCANFLEX hardware, which can be dynamically adjusted to the respective debug interface (JTAG, BDM, SBW, SWD, COP, etc.).

Direct access to the processor creates a universally usable test center that can perform a wide range of operations via VarioTAP POLARIS control:

  • Flash programming (NAND/NOR, SPI, I2C)
  • Programming of microcontrollers (MCUs)

ChipVORX is an IP-based technology for implementation, access and control of Chip embedded Instruments via IEEE Std. 1149.x/JTAG. It also supports FPGA embedded instruments in the form of softcores. The ChipVORX library currently contains more than 300 different test and measurement instruments for all leading FPGA platforms. The usage of ChipVORX requires neither expert background knowledge nor specific FPGA tools or continuous IP adjustments.The FPGA-integrated ChipVORX models are functional software IPs with a modular architecture. This allows you to configure FPGAs individually to use them for functional testing. The capabilities already provided by FPGAs or CPLDs are used to increase test coverage and speed.
Which applications can ChipVORX POLARIS perform?

  • High-speed in-system flash programming

Goepel Boundary Scan Technologies Overview  
Goepel ESA Software Brochure
Goepel Boundary Scan & Embedded System Acces Brochure  

Goepel Boundary Scan Design for Test Guide  
Goepel Boundary Scan Basics Brochure